Conventionally, switched capacitor amplifiers have been used in a variety of fields, for example, as a PGA (Programmable Gain Amplifier) amplifying an analog signal as input via a CDS (Correlated Double Sampling) circuit from a CCD (Charge-Coupled Device) as disclosed in, for example, 2000 IEEE International Solid State Circuits Conference, Digest of Technical papers, pp190-191.
FIG. 5 shows a switched capacitor amplifier circuit 101 as an example of generally used conventional differential input and output circuits, wherein in the sampling interface, signals Vip and Vim as input as differential input signals Vi are input to input capacitors 107p and 107m via switches 108p and 108m respectively. On the other hand, in the sampling interface, input reset switches 104p and 104m are conducted, and the output terminals of the input capacitors 107p and 107m are connected to ground. With this structure, in the input capacitors 107p and 107m, stored are charges corresponding to the signals Vip and Vim respectively, and a non-inverting output terminal and an inverting output terminal of an operational amplifier 102 are reset to a ground level.
In the sampling phase, the non-inverting output terminal and the inverting output terminal of the operational amplifier 102 are reset by conducting an output reset switch 103 provided between the terminals. On the other hand, to the other end of a negative feedback capacitor 106p connected to the inverse input terminal of the operational amplifier 102, a reference voltage Verf is applied via a switch 105p. 
In the hold phase after the sampling phase, the output reset switch 103, and the input reset switches 104p and 104m are cut off. Further, the switches 108 and 108m are cut off, and the terminals of the input capacitors 107p and 107m on the side of the switches 108p and 108m are short-circuited by a switch 109. Instead of applying a reference voltage Vref, the switch 105p connects a negative feedback capacitor 106p to the non-inverting output terminal of the operational amplifier 102. Similarly, instated of applying the reference voltage, the switch 105m connects the negative feedback capacitor 106m to the non-inverting output terminal of the operational amplifier 102.
The switches 105p, 105m, 108p, 108m and 109 are switched after cutting-off the input reset switches 104p and 104m. Therefore, a sum of charges are stored between the capacitor 106p and the capacitor 107p, and also a sum of charges are stored between the capacitor 106m and the capacitor 107m. 
With this structure, an output voltage Vo(=Vop−Vom) of the switched capacitor amplifier circuit 101 is given by the following equation (1) in the hold phase.Vop−Vom=Cs/Cf×(Vip−Vim)  (1) 
In the equation (1), Cs indicates an electrostatic capacitor [F] of input capacitors 107p and 107m, and Cf indicates an electrostatic capacitor [F] of the negative input capacitors 106p and 106m. 
However, the foregoing conventional structure has a problem in that when a larger gain is set, variations in amplification factor with variations in processes become more obvious.
Specifically, as is clear from the equation (1), the gain G of the conventional switched capacitor amplifier circuit 102 is given by Cs/Cf. Therefore, in the switched capacitor amplifier circuit 101, since the gain G is equal to the electrostatic capacitance ratio Cmax/Cmin (=Cs/Cf) between the capacitors 106 and 106m, and the capacitors 107p and 107m, the electrostatic capacitor ratio Cmax/Cmin becomes larger for the larger gain. As a result, for the larger gain, an area occupied by one capacitor becomes larger than an area occupied by the other capacitor, and it becomes more liable to be affected by variations in processes.
Furthermore, the feedback factor β is given by the following equation (2):                                                         β              =                            ⁢                              Cf                /                                  (                                      Cs                    +                    Cf                                    )                                                                                                        =                            ⁢                                                1                  /                  2                                ×                                  (                                      1                    -                                          Cx                      /                      Ca                                                        )                                                                                        (        2        )            
Therefore, when setting a larger gain by setting a larger electrostatic capacitance ratio Cmax/Cmin, a feedback factor becomes smaller, which in turn reduces an operation speed of the switched capacitor amplifier circuit 101.